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  • EPM7256AEQC208-5N

EPM7256AEQC208-5N

PMIC 208 Pin 250MHz 3.3V PQFP


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7256AEQC208-5N
  • Package: PQFP
  • Datasheet: PDF
  • Stock: 117
  • Description: PMIC 208 Pin 250MHz 3.3V PQFP (Kg)

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Details

Tags

Parameters
Factory Lead Time 10 Weeks
Mount Surface Mount
Package / Case PQFP
Number of Pins 208
Published 1998
JESD-609 Code e3
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3
Number of Terminations 208
ECCN Code 3A991
Terminal Finish Matte Tin (Sn) - annealed
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature YES
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 245
Supply Voltage 3.3V
Frequency 250MHz
Time@Peak Reflow Temperature-Max (s) 40
Pin Count 208
Qualification Status Not Qualified
Operating Supply Voltage 3.3V
Temperature Grade COMMERCIAL
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Number of I/O 164
Memory Type EEPROM
Propagation Delay 5.5 ns
Turn On Delay Time 5.5 ns
Frequency (Max) 172.4MHz
Programmable Logic Type EE PLD
Number of Gates 5000
Number of Programmable I/O 164
Number of Logic Blocks (LABs) 16
Speed Grade 5
Output Function MACROCELL
Number of Macro Cells 256
JTAG BST YES
In-System Programmable YES
Height Seated (Max) 4.1mm
Length 28mm
Width 28mm
RoHS Status RoHS Compliant
Lead Free Lead Free

EPM7256AEQC208-5N Overview


There are 256 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.The item is enclosed in a PQFP package.It is programmed with 164 I/Os.Devices are programmed with terminations of [0].The terminal position of this electrical component is QUAD.The power source is powered by 3.3Vvolts.It is included in Programmable Logic Devices.It is programmed with 208 pins.This device is also capable of displaying [0].The 5000gates serve as building blocks for digital circuits.If high efficiency is desired, the supply voltage should be kept at [0].It is recommended that data be stored in [0].Surface Mountis used to mount this electronic component.The 208pins are designed into the board.With a maximum supply voltage of [0], it operates.A minimum supply voltage of 3V is required for this device to operate.There are 164 Programmable I/Os.It is possible to achieve a frequency of 250MHz.The operating temperature should be higher than 0°C.There should be a temperature below 70°Cat the time of operation.There are 16 logic blocks (LABs) in its basic building block.There should be a lower maximum frequency than 172.4MHz.Programmable logic types are divided into EE PLD.

EPM7256AEQC208-5N Features


PQFP package
164 I/Os
208 pin count
208 pins
16 logic blocks (LABs)

EPM7256AEQC208-5N Applications


There are a lot of Altera EPM7256AEQC208-5N CPLDs applications.

  • Storage Cards and Storage Racks
  • ToR/Aggregation/Core Switch and Router
  • ROM patching
  • Configurable Addressing of I/O Boards
  • ANALOG-TO-DIGITAL CONVERTOR (ADC)
  • SUPERVISORY FUNCTION (LVD AND WATCHDOG)
  • SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
  • Power Meter SMPS
  • Digital multiplexers
  • Software-driven hardware configuration