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EPM7256AETC100-5N

PMIC 100 Pin 250MHz 3.3V TQFP


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7256AETC100-5N
  • Package: TQFP
  • Datasheet: PDF
  • Stock: 361
  • Description: PMIC 100 Pin 250MHz 3.3V TQFP (Kg)

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FedEx International, 5-7 business days.

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Details

Tags

Parameters
Factory Lead Time 10 Weeks
Mount Surface Mount
Package / Case TQFP
Number of Pins 100
Published 1998
JESD-609 Code e3
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3
Number of Terminations 100
ECCN Code 3A991
Terminal Finish Matte Tin (Sn) - annealed
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature YES
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Frequency 250MHz
Time@Peak Reflow Temperature-Max (s) 40
Pin Count 100
Operating Supply Voltage 3.3V
Temperature Grade COMMERCIAL
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Number of I/O 84
Memory Type EEPROM
Propagation Delay 5.5 ns
Turn On Delay Time 5.5 ns
Frequency (Max) 172.4MHz
Programmable Logic Type EE PLD
Number of Gates 5000
Number of Programmable I/O 84
Number of Logic Blocks (LABs) 16
Speed Grade 5
Output Function MACROCELL
Number of Macro Cells 256
JTAG BST YES
In-System Programmable YES
Height Seated (Max) 1.27mm
Length 14mm
Width 14mm
Radiation Hardening No
RoHS Status RoHS Compliant
Lead Free Lead Free

EPM7256AETC100-5N Overview


Currently, there are 256 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.There is a TQFP package containing it.As a result, it has 84 I/O ports programmed.The device is programmed with 100 terminations.As the terminal position of this electrical part is [0], it serves as an important access point for passengers or freight.Power is supplied by a voltage of 3.3V volts.The part is included in Programmable Logic Devices.A chip with 100pins is programmed.When using this device, YESis also available.There are 5000 gates, which are devices that acts as a building block for digital circuits. The supply voltage should be maintained at 3.3V for high efficiency.In order to store data, EEPROMis used.In this case, Surface Mountis used to mount the electronic component.The pins are [0].A maximum voltage of 3.6Vis required for operation.It operates with the minimal supply voltage of 3V.There are a total of 84 Programmable I/Os.This frequency can be achieved at 250MHz.Operating temperatures should be higher than 0°C.A temperature lower than 70°Cis recommended for operation.The system consists of 16 logic blocks (LABs).The maximum frequency should not exceed 172.4MHz.Programmable logic types are divided into EE PLD.

EPM7256AETC100-5N Features


TQFP package
84 I/Os
100 pin count
100 pins
16 logic blocks (LABs)

EPM7256AETC100-5N Applications


There are a lot of Altera EPM7256AETC100-5N CPLDs applications.

  • Handheld digital devices
  • I2C BUS INTERFACE
  • Wide Vin Industrial low power SMPS
  • ROM patching
  • POWER-SAVING MODES
  • Wireless Infrastructure Base Band Unit and Remote Radio Unit
  • Timing control
  • Network Interface Card (NIC) and Host Bus Adapter (HBA)
  • Code converters
  • USB Bus