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EPM7256BFC100-7

1.8/3.32.5V 1mm PMIC 2.5V


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7256BFC100-7
  • Package: -
  • Datasheet: -
  • Stock: 378
  • Description: 1.8/3.32.5V 1mm PMIC 2.5V (Kg)

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Details

Tags

Parameters
Surface Mount YES
JESD-609 Code e0
Moisture Sensitivity Level (MSL) 3
Number of Terminations 100
Terminal Finish Tin/Lead (Sn/Pb)
Additional Feature YES
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 220
Supply Voltage 2.5V
Terminal Pitch 1mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Pin Count 100
JESD-30 Code S-PBGA-B100
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 2.625V
Power Supplies 1.8/3.32.5V
Supply Voltage-Min (Vsup) 2.375V
Number of I/O 84
Clock Frequency 126.6MHz
Propagation Delay 7.5 ns
Organization 4 DEDICATED INPUTS, 84 I/O
Programmable Logic Type EE PLD
Output Function MACROCELL
Number of Macro Cells 256
JTAG BST YES
Number of Dedicated Inputs 4
In-System Programmable YES
Height Seated (Max) 1.7mm
Length 11mm
Width 11mm
RoHS Status Non-RoHS Compliant

EPM7256BFC100-7 Overview


256macrocells exist, which are cells in a mobile phone network that are primarily composed of high-power towers, antennas, or masts.It is equipped with 84I/O ports.100terminations have been programmed into the device.The terminal position of this electrical component is BOTTOM.An electrical supply voltage of 2.5V is used to power it.This part is part of the family [0].There are 100pins on the chip.It is also characterized by YES.In order for the device to operate, it requires 1.8/3.32.5V power supplies.There is a maximum supply voltage (Vsup) of 2.625V.Input signals are detected using 4dedicated inputs.A supply voltage (Vsup) of greater than 2.375V should be used.Ideally, its clock frequency should not exceed 126.6MHz.There is a type of programmable logic called EE PLD.

EPM7256BFC100-7 Features


84 I/Os
100 pin count
1.8/3.32.5V power supplies

EPM7256BFC100-7 Applications


There are a lot of Altera EPM7256BFC100-7 CPLDs applications.

  • INTERRUPT SYSTEM
  • Bootloaders for FPGAs
  • Digital systems
  • State machine design
  • POWER-SAVING MODES
  • Custom state machines
  • Protection relays
  • SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
  • Multiple Clock Source Selection
  • Dedicated input registers