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EPM7256SRC208-15N

0.5mm PMIC 208 Pin 100MHz 5V PQFP


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7256SRC208-15N
  • Package: PQFP
  • Datasheet: PDF
  • Stock: 681
  • Description: 0.5mm PMIC 208 Pin 100MHz 5V PQFP (Kg)

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Details

Tags

Parameters
Mount Surface Mount
Package / Case PQFP
Number of Pins 208
Published 1998
JESD-609 Code e3
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3
Number of Terminations 208
ECCN Code EAR99
Terminal Finish Matte Tin (Sn)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 245
Supply Voltage 5V
Terminal Pitch 0.5mm
Frequency 100MHz
Time@Peak Reflow Temperature-Max (s) 40
Pin Count 208
Operating Supply Voltage 5V
Temperature Grade COMMERCIAL
Max Supply Voltage 5.25V
Min Supply Voltage 4.75V
Number of I/O 164
Memory Type EEPROM
Propagation Delay 15 ns
Turn On Delay Time 15 ns
Frequency (Max) 128.2MHz
Programmable Logic Type EE PLD
Number of Gates 5000
Number of Programmable I/O 164
Number of Logic Blocks (LABs) 16
Speed Grade 15
Output Function MACROCELL
Number of Macro Cells 256
JTAG BST YES
In-System Programmable YES
Height Seated (Max) 4.1mm
Length 28mm
Width 28mm
Radiation Hardening No
RoHS Status RoHS Compliant
Lead Free Lead Free

EPM7256SRC208-15N Overview


There are 256 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).It is embedded in the PQFP package.This device has 164 I/O ports programmed into it.208terminations have been programmed into the device.This electrical component has a terminal position of 0.An electrical supply voltage of 5V is used to power it.It is a part of family [0].There are 208 pins on the chip.This device can also display [0].In digital circuits, there are 5000gates, which act as a basic building block.For high efficiency, the supply voltage should be maintained at [0].It is recommended that data be stored in [0].This electronic part is mounted in the way of Surface Mount.The 208pins are designed into the board.This device operates at a voltage of 5.25Vas its maximum supply voltage.A minimum supply voltage of 4.75V is required for it to operate.There are 164 Programmable I/Os.There is 100MHz frequency that can be achieved.There should be a temperature above 0°Cat the time of operation.Temperatures should be lower than 70°C when operating.In its simplest form, it consists of 16 logic blocks (LABs).The maximum frequency should not exceed 128.2MHz.Programmable logic types can be divided into EE PLD.

EPM7256SRC208-15N Features


PQFP package
164 I/Os
208 pin count
208 pins
16 logic blocks (LABs)

EPM7256SRC208-15N Applications


There are a lot of Altera EPM7256SRC208-15N CPLDs applications.

  • Custom state machines
  • DMA control
  • INTERRUPT SYSTEM
  • Power automation
  • Complex programmable logic devices
  • ANALOG-TO-DIGITAL CONVERTOR (ADC)
  • I/O expansion
  • Power up sequencing
  • I2C BUS INTERFACE
  • Programmable power management