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  • GAL18V10B-20LP

GAL18V10B-20LP

5V 2.54mm PMIC GAL?18V10 Series GAL18V10 20 Pin 62.5MHz 5V 20-DIP (0.300, 7.62mm)


  • Manufacturer: Lattice Semiconductor Corporation
  • Origchip NO: 477-GAL18V10B-20LP
  • Package: 20-DIP (0.300, 7.62mm)
  • Datasheet: PDF
  • Stock: 353
  • Description: 5V 2.54mm PMIC GAL?18V10 Series GAL18V10 20 Pin 62.5MHz 5V 20-DIP (0.300, 7.62mm) (Kg)

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Details

Tags

Parameters
Mount Through Hole
Mounting Type Through Hole
Package / Case 20-DIP (0.300, 7.62mm)
Number of Pins 20
Operating Temperature 0°C~75°C TA
Packaging Tube
Published 2003
Series GAL®18V10
JESD-609 Code e0
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn/Pb)
Additional Feature REGISTER PRELOAD; POWER-UP RESET
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position DUAL
Peak Reflow Temperature (Cel) NOT SPECIFIED
Supply Voltage 5V
Terminal Pitch 2.54mm
Reach Compliance Code not_compliant
Frequency 62.5MHz
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number GAL18V10
Pin Count 20
Number of Outputs 10
Qualification Status Not Qualified
Power Supplies 5V
Programmable Type EE PLD
Max Supply Voltage 5.25V
Min Supply Voltage 4.75V
Number of I/O 10
Nominal Supply Current 115mA
Propagation Delay 20 ns
Turn On Delay Time 20 ns
Architecture PAL-TYPE
Output Function MACROCELL
Number of Macro Cells 10
Number of Dedicated Inputs 7
Voltage Supply - Internal 4.75V~5.25V
Number of Product Terms 96
Height Seated (Max) 4.57mm
Length 26.125mm
Width 7.62mm
RoHS Status Non-RoHS Compliant
Lead Free Lead Free

GAL18V10B-20LP Overview


In the mobile phone network, there are 10macro cells, which are cells with high-power antennas and towers.It is contained in package [0].As a result, it has 10 I/O ports programmed.The device is programmed with 20 terminations.This electrical part has a terminal position of DUALand is connected to the ground.It is powered by a voltage of 5V volts.It is included in Programmable Logic Devices.Tubeshould be used to package the chip.Due to its reliability, it is operated at a temperature of [0].Ideally, the chip should be mounted by Through Hole.It belongs to the GAL?18V10series of FPGAs.There are 20pins on the chip.It is also possible to find REGISTER PRELOAD; POWER-UP RESETwhen using this device.GAL18V10contains its related parts.Through Holeis the mounting point of this electronic part.It is designed with 20 pins.This device operates at a voltage of 5.25Vas its maximum supply voltage.Normally, it operates with a voltage of 4.75VV as its minimum supply voltage.A power supply of 5Vvolts is required to operate this device.You can achieve 62.5MHzfrequencies.To detect input signals, there are 7 dedicated inputs.The device is configured with an output of [0].In addition, it contains 96 product terms.

GAL18V10B-20LP Features


20-DIP (0.300, 7.62mm) package
10 I/Os
The operating temperature of 0°C~75°C TA
20 pin count
20 pins
5V power supplies
10 outputs

GAL18V10B-20LP Applications


There are a lot of Lattice Semiconductor Corporation GAL18V10B-20LP CPLDs applications.

  • ROM patching
  • Reset swapping
  • INTERRUPT SYSTEM
  • I/O PORTS (MCU MODULE)
  • Parity generators
  • Address decoders
  • Field programmable gate
  • TIMERS/COUNTERS
  • Network Interface Card (NIC) and Host Bus Adapter (HBA)
  • Pattern recognition