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  • IDT74ALVCH16721PAG

IDT74ALVCH16721PAG

2.7V~3.6V 150MHz D-Type Flip Flop 74ALVCH16721 40μA 74ALVCH Series 56-TFSOP (0.240, 6.10mm Width)


  • Manufacturer: Renesas Electronics America Inc.
  • Origchip NO: 668-IDT74ALVCH16721PAG
  • Package: 56-TFSOP (0.240, 6.10mm Width)
  • Datasheet: PDF
  • Stock: 892
  • Description: 2.7V~3.6V 150MHz D-Type Flip Flop 74ALVCH16721 40μA 74ALVCH Series 56-TFSOP (0.240, 6.10mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 56-TFSOP (0.240, 6.10mm Width)
Operating Temperature -40°C~85°C TA
Packaging Tube
Series 74ALVCH
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Type D-Type
Voltage - Supply 2.7V~3.6V
Base Part Number 74ALVCH16721
Function Standard
Output Type Tri-State, Non-Inverted
Number of Elements 1
Clock Frequency 150MHz
Current - Quiescent (Iq) 40μA
Current - Output High, Low 24mA 24mA
Number of Bits per Element 20
Max Propagation Delay @ V, Max CL 4.3ns @ 3.3V, 50pF
Trigger Type Positive Edge
Input Capacitance 5pF

IDT74ALVCH16721PAG Overview


The flip flop is packaged in 56-TFSOP (0.240, 6.10mm Width). As part of the package Tube, it is embedded. T flip flop is configured with an output of Tri-State, Non-Inverted. It is configured with the trigger Positive Edge. There is an electronic component mounted in the way of Surface Mount. The JK flip flop operates at 2.7V~3.6Vvolts. It is at -40°C~85°C TAdegrees Celsius that the system is operating. This electronic flip flop is of type D-Type. The 74ALVCHseries comprises this type of FPGA. This D flip flop should not have a frequency greater than 150MHz. In total, it contains 1 elements. During its operation, it consumes 40μA quiescent energy. JK flip flop belongs to 74ALVCH16721 family. Its input capacitance is 5pF farads.

IDT74ALVCH16721PAG Features


Tube package
74ALVCH series

IDT74ALVCH16721PAG Applications


There are a lot of Renesas Electronics America Inc. IDT74ALVCH16721PAG Flip Flops applications.

  • Frequency Divider circuits
  • Balanced Propagation Delays
  • Latch-up performance
  • Common Clocks
  • Shift Registers
  • 2 – Bit synchronous counter
  • Power down protection
  • Safety Clamp
  • Communications
  • Event Detectors