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LAMXO640E-3TN144E

0.5mm PMIC LA-MachXO Series LAMXO640 144 Pin 1.2V 144-LQFP


  • Manufacturer: Lattice Semiconductor Corporation
  • Origchip NO: 477-LAMXO640E-3TN144E
  • Package: 144-LQFP
  • Datasheet: PDF
  • Stock: 935
  • Description: 0.5mm PMIC LA-MachXO Series LAMXO640 144 Pin 1.2V 144-LQFP (Kg)

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Details

Tags

Parameters
Factory Lead Time 8 Weeks
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 144-LQFP
Number of Pins 144
Operating Temperature -40°C~125°C TA
Packaging Tray
Published 2000
Series LA-MachXO
JESD-609 Code e3
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 144
ECCN Code EAR99
Terminal Finish Matte Tin (Sn)
HTS Code 8542.39.00.01
Subcategory Field Programmable Gate Arrays
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.2V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) 40
Base Part Number LAMXO640
Pin Count 144
Number of Outputs 113
Operating Supply Voltage 1.2V
Programmable Type In System Programmable
Max Supply Voltage 1.26V
Min Supply Voltage 1.14V
Memory Size 768B
Number of I/O 113
Nominal Supply Current 14mA
Memory Type SRAM
Clock Frequency 25MHz
Propagation Delay 4.9 ns
Turn On Delay Time 4.9 ns
Number of Logic Elements/Cells 640
Screening Level AEC-Q100
Number of Logic Blocks (LABs) 80
Output Function MACROCELL
Number of Macro Cells 320
Number of Logic Cells 640
Voltage Supply - Internal 1.14V~1.26V
Height Seated (Max) 1.6mm
Length 20mm
Width 20mm
Radiation Hardening No
RoHS Status ROHS3 Compliant
Lead Free Lead Free

LAMXO640E-3TN144E Overview


320macrocells exist, which are cells in a mobile phone network that are primarily composed of high-power towers, antennas, or masts.A 144-LQFP package contains the item.As a result, it has 113 I/O ports programmed.Devices are programmed with terminations of [0].This electrical part has a terminal position of QUADand is connected to the ground.A voltage of 1.2Vprovides power to the device.It is a part of the family [0].It is recommended that the chip be packaged by Tray.Ensure its reliability by operating at [0].It is mounted in the way of Surface Mount.The LA-MachXOseries comprises this type of FPGA.There are 144pins on the chip.The LAMXO640shows its related parts.If high efficiency is desired, the supply voltage should be kept at [0].It is recommended that data be stored in [0].The electronic part is mounted by Surface Mount.144pins are included in its design.There is a maximum supply voltage of 1.26V.In order for it to operate, a supply voltage of 1.14Vis required.It is composed of 80 logic blocks (LABs).As a fundamental building block, there are 640 logic elements/cells.A frequency of 25MHzshould not be exceeded by its clock.It is possible to store data and programs in the devices' 768Bmemory.The output configuration is set to [0].

LAMXO640E-3TN144E Features


144-LQFP package
113 I/Os
The operating temperature of -40°C~125°C TA
144 pin count
144 pins
80 logic blocks (LABs)
113 outputs

LAMXO640E-3TN144E Applications


There are a lot of Lattice Semiconductor Corporation LAMXO640E-3TN144E CPLDs applications.

  • Portable digital devices
  • Digital systems
  • State machine control
  • Wide Vin Industrial low power SMPS
  • Random logic replacement
  • Software-driven hardware configuration
  • PLC analog input modules
  • Multiple Clock Source Selection
  • White goods (Washing, Cold, Aircon ,...)
  • I/O expansion