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LC5512MV-75Q208I

0.5mm PMIC ispXPLD? 5000MV Series LC5512 208 Pin 200MHz 3.3V 208-BFQFP


  • Manufacturer: Lattice Semiconductor Corporation
  • Origchip NO: 477-LC5512MV-75Q208I
  • Package: 208-BFQFP
  • Datasheet: PDF
  • Stock: 405
  • Description: 0.5mm PMIC ispXPLD? 5000MV Series LC5512 208 Pin 200MHz 3.3V 208-BFQFP (Kg)

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Details

Tags

Parameters
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 208-BFQFP
Number of Pins 208
Operating Temperature -40°C~105°C TJ
Packaging Tray
Published 2000
Series ispXPLD® 5000MV
JESD-609 Code e0
Pbfree Code no
Part Status Obsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 208
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn85Pb15)
Additional Feature YES
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 225
Supply Voltage 3.3V
Terminal Pitch 0.5mm
Frequency 200MHz
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number LC5512
Pin Count 208
Qualification Status Not Qualified
Operating Supply Voltage 3.3V
Programmable Type In System Programmable
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Operating Supply Current 33mA
Number of I/O 149
Nominal Supply Current 33mA
RAM Size 32kB
Memory Type EEPROM, SRAM
Propagation Delay 7.5 ns
Number of Programmable I/O 100
Output Function MACROCELL
Number of Macro Cells 512
JTAG BST YES
Voltage Supply - Internal 3V~3.6V
Number of Logic Elements/Blocks 16
Height Seated (Max) 4.1mm
Length 28mm
Width 28mm
RoHS Status Non-RoHS Compliant
Lead Free Lead Free

LC5512MV-75Q208I Overview


This network has 512macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).It is part of the 208-BFQFP package.This device has 149 I/O ports programmed into it.There are 208 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.As the terminal position of this electrical part is [0], it serves as an important access point for passengers or freight.A voltage of 3.3Vprovides power to the device.There is a part in the family [0].It is recommended to package the chip by Tray.A reliable operation is ensured by the operating temperature of [0].Mount the chip by Surface Mount.The ispXPLD? 5000MVseries comprises this type of FPGA.Chips are programmed with 208 pins.This device is also capable of displaying [0].The LC5512indicates that its related parts can be found.It is recommended that the supply voltage be kept at 3.3Vto maximize efficiency.In this case, EEPROM, SRAMwill be used to store the data.This device is mounted by Surface Mount.208pins are included in its design.This device operates at a voltage of 3.6V when the maximum supply voltage is applied.With a minimal supply voltage of [0], it operates.There are a total of 16 logic elements or blocks.A total of 100 Programmable I/Os are available.It is possible to achieve a frequency of 200MHz.

LC5512MV-75Q208I Features


208-BFQFP package
149 I/Os
The operating temperature of -40°C~105°C TJ
208 pin count
208 pins

LC5512MV-75Q208I Applications


There are a lot of Lattice Semiconductor Corporation LC5512MV-75Q208I CPLDs applications.

  • INTERRUPT SYSTEM
  • Wireless Infrastructure Base Band Unit and Remote Radio Unit
  • I2C BUS INTERFACE
  • POWER-SAVING MODES
  • Multiple Clock Source Selection
  • Address decoders
  • Random logic replacement
  • Software-Driven Hardware Configuration
  • Code converters
  • Programmable power management