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LCMXO2-640HC-6TG100I

2.5V V 5.9kB B FPGAs MachXO2 Series 100-LQFP 28μA mA 0.5mm mm 100


  • Manufacturer: Lattice Semiconductor Corporation
  • Origchip NO: 477-LCMXO2-640HC-6TG100I
  • Package: 100-LQFP
  • Datasheet: PDF
  • Stock: 541
  • Description: 2.5V V 5.9kB B FPGAs MachXO2 Series 100-LQFP 28μA mA 0.5mm mm 100 (Kg)

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Details

Tags

Parameters
Factory Lead Time 8 Weeks
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 100-LQFP
Number of Pins 100
Operating Temperature -40°C~100°C TJ
Packaging Tray
Published 2013
Series MachXO2
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 100
ECCN Code EAR99
Terminal Finish Matte Tin (Sn)
HTS Code 8542.39.00.01
Subcategory Field Programmable Gate Arrays
Technology CMOS
Voltage - Supply 2.375V~3.465V
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 2.5V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number LCMXO2-640
Pin Count 100
Number of Outputs 79
Qualification Status Not Qualified
Operating Supply Voltage 2.5V
Power Supplies 2.5/3.3V
Memory Size 5.9kB
Operating Supply Current 28μA
Number of I/O 78
RAM Size 2.3kB
Memory Type FLASH
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Number of Logic Elements/Cells 640
Total RAM Bits 18432
Max Frequency 133MHz
Number of LABs/CLBs 80
Number of Macro Cells 320
Number of Logic Cells 640
RoHS Status ROHS3 Compliant
Lead Free Lead Free

LCMXO2-640HC-6TG100I Overview


In the 100-LQFP package, you will find fpga chips. This kind of FPGA is composed of FIELD PROGRAMMABLE GATE ARRAY. This device features 78 I/Os in order to transfer data in a more efficient manner. A fundamental building block contains 640 logic elements or cells. It is powered from a supply voltage of 2.5V. An FPGA part from the Field Programmable Gate Arrays family. An attachment Surface Mount allows the FPGA module to be attached to the development board. There is a 2.375V~3.465V-volt supply voltage required for the device to operate. The MachXO2 series FPGA is a type of FPGA that belongs to the MachXO2 family of FPGAs. During the operation of the system, the operating temperature should remain within the range of -40°C~100°C TJ. This device is equipped with 79 separate outputs, which makes it a very versatile device. It is for space saving reasons that this FPGA model is contained in Tray. There are a total of 100 terminations. Fpga electronics is worth mentioning that this device provides 18432 bfpga electronics s of RAM. Parts related to this part can be found using its base part number LCMXO2-640. Fpga electronics is important that this FPGA module has a RAM si2.3kBe of 2.3kB in order to ensure that the program will run normally. There are 100 pins on this device. This FPGA is built as an array of 80 LABs/CLBs. In my opinion, this FPGA could produce fantastic results if mounted in Surface Mount, provided that its specifications are followed. A 2.5V-volt supply allows designers to fully utilize its flexibility. Powered by a 2.5/3.3V power supply, it can be operated by almost anyone. The device has a total of 100 pins on fpga semiconductor. In this FPGA module, there is a memory of 5.9kB that can be used to store programs and data. As far as the speed of this FPGA is concerned, it can get up to 133MHz. Fpga semiconductor incorporates 640 logic cells used for the building block. There is a 28μA supply current used in its operation. Fpga circuit is important to note that the main building blocks of a CPLD in this device are 320 macrocells. This memory is designed for storing data and avoiding resource conflicts.

LCMXO2-640HC-6TG100I Features


78 I/Os
Up to 18432 RAM bits
100 LABs/CLBs

LCMXO2-640HC-6TG100I Applications


There are a lot of Lattice Semiconductor Corporation LCMXO2-640HC-6TG100I FPGAs applications.

  • Development Boards and Shields for Microcontrollers
  • Cryptography
  • Voice recognition
  • Automotive Applications
  • Aircraft navigation
  • Medical imaging
  • Data Mining
  • Aerospace and Defense
  • ADAS
  • Integrating multiple SPLDs