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MC100EL35DT

-4.2V~-5.7V 2.2GHz 2 Bit D-Type Flip Flop DUAL 100EL35 32mA 100EL Series 8-TSSOP, 8-MSOP (0.118, 3.00mm Width)


  • Manufacturer: ON Semiconductor
  • Origchip NO: 598-MC100EL35DT
  • Package: 8-TSSOP, 8-MSOP (0.118, 3.00mm Width)
  • Datasheet: -
  • Stock: 499
  • Description: -4.2V~-5.7V 2.2GHz 2 Bit D-Type Flip Flop DUAL 100EL35 32mA 100EL Series 8-TSSOP, 8-MSOP (0.118, 3.00mm Width)(Kg)

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Details

Tags

Parameters
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 8-TSSOP, 8-MSOP (0.118, 3.00mm Width)
Operating Temperature -40°C~85°C TA
Packaging Tube
Published 2008
Series 100EL
JESD-609 Code e0
Part Status Obsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 8
Type D-Type
Additional Feature NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V
Subcategory FF/Latches
Packing Method RAIL
Technology ECL
Voltage - Supply -4.2V~-5.7V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 240
Supply Voltage 5V
Terminal Pitch 0.65mm
Reach Compliance Code not_compliant
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 100EL35
JESD-30 Code S-PDSO-G8
Function Reset
Qualification Status Not Qualified
Output Type Differential
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 5.7V
Power Supplies +-5V
Supply Voltage-Min (Vsup) 4.2V
Number of Circuits 1
Number of Bits 2
Clock Frequency 2.2GHz
Propagation Delay 700 ps
Turn On Delay Time 525 ps
Logic Function Flip-Flop
Current - Quiescent (Iq) 32mA
Prop. Delay@Nom-Sup 0.745 ns
Trigger Type Positive Edge
Power Supply Current-Max (ICC) 37mA
Clock Edge Trigger Type Positive Edge
Length 3mm
Width 3mm
RoHS Status Non-RoHS Compliant
Lead Free Contains Lead

MC100EL35DT Overview


As a result, it is packaged as 8-TSSOP, 8-MSOP (0.118, 3.00mm Width). D flip flop is included in the Tubepackage. It is configured with Differentialas an output. It is configured with a trigger that uses Positive Edge. There is an electric part mounted in the way of Surface Mount. Powered by a -4.2V~-5.7Vvolt supply, it operates as follows. It is operating at -40°C~85°C TA. D-Typeis the type of this D latch. It belongs to the 100ELseries of FPGAs. You should not exceed 2.2GHzin the output frequency of the device. As a result, it consumes 32mA quiescent current and is not affected by external forces. In 8terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. This D latch belongs to the family of 100EL35. A voltage of 5V provides power to the D latch. There is an electronic component mounted in the way of Surface Mount. The clock edge trigger type for this device is Positive Edge. It is included in FF/Latches. This flip flop is designed with 2 Bits. 5.7Vis the maximum supply voltage (Vsup). A normal operating voltage (Vsup) should remain above 4.2V. Using 1 circuits, it is highly flexible. Compared to other similar T flip flops, this device offers reliable performance and is well suited for RAIL. A power supply of +-5Vis required to operate it. NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7Vis also one of its characteristics.

MC100EL35DT Features


Tube package
100EL series
2 Bits
+-5V power supplies

MC100EL35DT Applications


There are a lot of ON Semiconductor MC100EL35DT Flip Flops applications.

  • Computers
  • Counters
  • Synchronous counter
  • Buffer registers
  • Guaranteed simultaneous switching noise level
  • Pattern generators
  • Memory
  • Buffered Clock
  • Shift Registers
  • ESD protection