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  • MC100EP131MNG

MC100EP131MNG

-3V~-5.5V 3GHz 4 Bit D-Type Flip Flop QUAD 100EP131 32 Pins 120mA 100EP Series 32-VFQFN Exposed Pad


  • Manufacturer: ON Semiconductor
  • Origchip NO: 598-MC100EP131MNG
  • Package: 32-VFQFN Exposed Pad
  • Datasheet: PDF
  • Stock: 241
  • Description: -3V~-5.5V 3GHz 4 Bit D-Type Flip Flop QUAD 100EP131 32 Pins 120mA 100EP Series 32-VFQFN Exposed Pad(Kg)

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Details

Tags

Parameters
Factory Lead Time 5 Weeks
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 32-VFQFN Exposed Pad
Number of Pins 32
Operating Temperature -40°C~85°C TA
Packaging Tube
Published 2005
Series 100EP
JESD-609 Code e3
Pbfree Code yes
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 32
Type D-Type
Terminal Finish Tin (Sn)
Additional Feature NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V
Subcategory FF/Latches
Packing Method TRAY
Technology ECL
Voltage - Supply -3V~-5.5V
Terminal Position QUAD
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) 40
Base Part Number 100EP131
Function Set(Preset) and Reset
Output Type Differential
Number of Elements 1
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 5.5V
Supply Voltage-Min (Vsup) 3V
Number of Bits 4
Clock Frequency 3GHz
Propagation Delay 600 ps
Turn On Delay Time 460 ps
Logic Function AND
Current - Quiescent (Iq) 120mA
Halogen Free Halogen Free
Trigger Type Positive, Negative
Number of Input Lines 4
Clock Edge Trigger Type Positive Edge
Max Frequency@Nom-Sup 3000000000Hz
Length 5mm
Width 5mm
Radiation Hardening No
RoHS Status RoHS Compliant
Lead Free Lead Free

MC100EP131MNG Overview


The flip flop is packaged in 32-VFQFN Exposed Pad. D flip flop is embedded in the Tube package. T flip flop uses Differentialas the output. It is configured with a trigger that uses a value of Positive, Negative. There is an electronic component mounted in the way of Surface Mount. The JK flip flop operates at a voltage of -3V~-5.5V. It is operating at a temperature of -40°C~85°C TA. D-Typedescribes this flip flop. This type of FPGA is a part of the 100EP series. It should not exceed 3GHzin its output frequency. A total of 1elements are present in it. As a result, it consumes 120mA quiescent current and is not affected by external forces. There are 32 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. Members of the 100EP131family make up this object. The power source is powered by 3.3V. It is mounted in the way of Surface Mount. There are 32pins on it. This device has the clock edge trigger type of Positive Edge. This RS flip flops is a part number FF/Latches. This flip flop is designed with 4 Bits. 5.5Vis the maximum supply voltage (Vsup). Normally, the supply voltage (Vsup) should be above 3V. A reliable performance of this D flip flop makes it well suited for use in TRAY. A total of 4input lines have been provided. Additionally, there are NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V on the electronic flip flop that can be referred to.

MC100EP131MNG Features


Tube package
100EP series
32 pins
4 Bits

MC100EP131MNG Applications


There are a lot of ON Semiconductor MC100EP131MNG Flip Flops applications.

  • Test & Measurement
  • Balanced Propagation Delays
  • Count Modes
  • Functionally equivalent to the MC10/100EL29
  • EMI reduction circuitry
  • Set-reset capability
  • Divide a clock signal by 2 or 4
  • Pattern generators
  • Computers
  • Digital electronics systems