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MC100EP131MNR4G

-3V~-5.5V 3GHz 4 Bit D-Type Flip Flop QUAD 100EP131 32 Pins 120mA 100EP Series 32-VFQFN Exposed Pad


  • Manufacturer: ON Semiconductor
  • Origchip NO: 598-MC100EP131MNR4G
  • Package: 32-VFQFN Exposed Pad
  • Datasheet: PDF
  • Stock: 547
  • Description: -3V~-5.5V 3GHz 4 Bit D-Type Flip Flop QUAD 100EP131 32 Pins 120mA 100EP Series 32-VFQFN Exposed Pad(Kg)

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Details

Tags

Parameters
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 32-VFQFN Exposed Pad
Number of Pins 32
Operating Temperature -40°C~85°C TA
Packaging Tape & Reel (TR)
Published 2006
Series 100EP
JESD-609 Code e3
Pbfree Code yes
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 32
Type D-Type
Terminal Finish Tin (Sn)
Additional Feature NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V
Subcategory FF/Latches
Technology ECL
Voltage - Supply -3V~-5.5V
Terminal Position QUAD
Terminal Form NO LEAD
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) 40
Base Part Number 100EP131
Function Set(Preset) and Reset
Qualification Status Not Qualified
Output Type Differential
Number of Elements 1
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 5.5V
Supply Voltage-Min (Vsup) 3V
Number of Bits 4
Clock Frequency 3GHz
Propagation Delay 600 ps
Turn On Delay Time 460 ps
Logic Function AND
Current - Quiescent (Iq) 120mA
Halogen Free Halogen Free
Trigger Type Positive, Negative
Number of Input Lines 4
Clock Edge Trigger Type Positive Edge
Max Frequency@Nom-Sup 3000000000Hz
Length 5mm
Width 5mm
RoHS Status RoHS Compliant
Lead Free Lead Free

MC100EP131MNR4G Overview


As a result, it is packaged as 32-VFQFN Exposed Pad. It is included in the package Tape & Reel (TR). Currently, the output is configured to use Differential. The trigger configured with it uses Positive, Negative. There is an electrical part that is mounted in the way of Surface Mount. It operates with a supply voltage of -3V~-5.5V. -40°C~85°C TAis the operating temperature. It belongs to the type D-Typeof flip flops. In terms of FPGAs, it belongs to the 100EP series. You should not exceed 3GHzin the output frequency of the device. A total of 1elements are present in it. It consumes 120mA of quiescent A total of 32terminations have been recorded. JK flip flop belongs to 100EP131 family. A voltage of 3.3V is used as the power supply for this D latch. There is an electronic part that is mounted in the way of Surface Mount. Basically, it is designed with a set of 32 pins. This device's clock edge trigger type is Positive Edge. This device is part of the FF/Latchesbase part number family. An electronic part with 4bits has been designed. In this case, the maximum supply voltage (Vsup) reaches 5.5V. For normal operation, the supply voltage (Vsup) should be kept above 3V. 4input lines are available for you to choose from. Additionally, it is characterized by NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V.

MC100EP131MNR4G Features


Tape & Reel (TR) package
100EP series
32 pins
4 Bits

MC100EP131MNR4G Applications


There are a lot of ON Semiconductor MC100EP131MNR4G Flip Flops applications.

  • Data Synchronizers
  • Shift registers
  • ESD protection
  • Matched Rise and Fall
  • Storage Registers
  • Bus hold
  • Memory
  • Functionally equivalent to the MC10/100EL29
  • Data storage
  • Set-reset capability