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MC100EP29DT

-3V~-5.5V 3GHz D-Type Flip Flop 57mA 100EP Series 20-TSSOP (0.173, 4.40mm Width)


  • Manufacturer: Rochester Electronics, LLC
  • Origchip NO: 699-MC100EP29DT
  • Package: 20-TSSOP (0.173, 4.40mm Width)
  • Datasheet: PDF
  • Stock: 663
  • Description: -3V~-5.5V 3GHz D-Type Flip Flop 57mA 100EP Series 20-TSSOP (0.173, 4.40mm Width)(Kg)

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Shipping Cost

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The basic freight (for package ≤0.5kg or corresponding volume) depends on the time zone and country.

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Delivery Time

Once the goods are shipped, estimated delivery time depends on the shipping methods you chose:

FedEx International, 5-7 business days.

The following are some common countries' logistic time.
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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 20-TSSOP (0.173, 4.40mm Width)
Operating Temperature -40°C~85°C TA
Packaging Tube
Series 100EP
Pbfree Code yes
Part Status Obsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Type D-Type
Voltage - Supply -3V~-5.5V
Reach Compliance Code unknown
Function Set(Preset) and Reset
Output Type Differential
Number of Elements 2
Clock Frequency 3GHz
Current - Quiescent (Iq) 57mA
Number of Bits per Element 1
Trigger Type Positive, Negative
RoHS Status ROHS3 Compliant

MC100EP29DT Overview


In the form of 20-TSSOP (0.173, 4.40mm Width), it has been packaged. D flip flop is included in the Tubepackage. T flip flop uses Differentialas its output configuration. It is configured with the trigger Positive, Negative. There is an electronic component mounted in the way of Surface Mount. A voltage of -3V~-5.5Vis used as the supply voltage. It is operating at a temperature of -40°C~85°C TA. The type of this D latch is D-Type. It belongs to the 100EPseries of FPGAs. Its output frequency should not exceed 3GHz. A total of 2elements are contained within it. There is 57mA quiescent consumption.

MC100EP29DT Features


Tube package
100EP series

MC100EP29DT Applications


There are a lot of Rochester Electronics, LLC MC100EP29DT Flip Flops applications.

  • Pattern generators
  • EMI reduction circuitry
  • Latch-up performance
  • Asynchronous counter
  • Bus hold
  • ESD performance
  • Divide a clock signal by 2 or 4
  • CMOS Process
  • Cold spare funcion
  • Buffer registers