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MC100EP35DTG

-3V~-5.5V 3GHz 2 Bit JK Type Flip Flop DUAL 100EP35 8 Pins 100EP Series 8-TSSOP, 8-MSOP (0.118, 3.00mm Width)


  • Manufacturer: ON Semiconductor
  • Origchip NO: 598-MC100EP35DTG
  • Package: 8-TSSOP, 8-MSOP (0.118, 3.00mm Width)
  • Datasheet: PDF
  • Stock: 941
  • Description: -3V~-5.5V 3GHz 2 Bit JK Type Flip Flop DUAL 100EP35 8 Pins 100EP Series 8-TSSOP, 8-MSOP (0.118, 3.00mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 8 Weeks
Lifecycle Status ACTIVE (Last Updated: 4 days ago)
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 8-TSSOP, 8-MSOP (0.118, 3.00mm Width)
Number of Pins 8
Operating Temperature -40°C~85°C TA
Packaging Tube
Published 2000
Series 100EP
JESD-609 Code e3
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 8
Type JK Type
Terminal Finish Tin (Sn)
Additional Feature NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V
Subcategory FF/Latches
Packing Method RAIL
Technology ECL
Voltage - Supply -3V~-5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 40
Base Part Number 100EP35
Function Reset
Output Type Differential
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 5.5V
Power Supplies -4.5V
Supply Voltage-Min (Vsup) 3V
Number of Bits 2
Clock Frequency 3GHz
Propagation Delay 575 ps
Turn On Delay Time 410 ps
Logic Function Flip-Flop, JK-Type
Halogen Free Halogen Free
Prop. Delay@Nom-Sup 0.575 ns
Trigger Type Positive Edge
High Level Output Current -50mA
Low Level Output Current 50mA
Number of Output Lines 1
Clock Edge Trigger Type Positive Edge
Max Frequency@Nom-Sup 3000000000Hz
Length 3mm
Width 3mm
Radiation Hardening No
RoHS Status ROHS3 Compliant
Lead Free Lead Free

MC100EP35DTG Overview


8-TSSOP, 8-MSOP (0.118, 3.00mm Width)is the packaging method. It is included in the package Tube. It is configured with Differentialas an output. This trigger uses the value Positive Edge. Surface Mountis occupied by this electronic component. Powered by a -3V~-5.5Vvolt supply, it operates as follows. It is at -40°C~85°C TAdegrees Celsius that the system is operating. There is JK Type type of electronic flip flop associated with this device. It is a type of FPGA belonging to the 100EP series. You should not exceed 3GHzin the output frequency of the device. The number of terminations is 8. If you search by 100EP35, you will find similar parts. A voltage of 3.3V is used as the power supply for this D latch. It is mounted in the way of Surface Mount. A total of 8pins are provided on this board. Its clock edge trigger type is Positive Edge. This device is part of the FF/Latchesbase part number family. There are 2bits in its design. As soon as 5.5Vis reached, Vsup reaches its maximum value. A normal operating voltage (Vsup) should remain above 3V. In light of its reliable performance, this T flip flop is well suited for RAIL. A power supply of -4.5Vis required to operate it. It is designed with 1 output lines. It is also characterized by NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V. A high level output current of -50mAis set. In the low level output current setting, the current is set to 50mA.

MC100EP35DTG Features


Tube package
100EP series
8 pins
2 Bits
-4.5V power supplies

MC100EP35DTG Applications


There are a lot of ON Semiconductor MC100EP35DTG Flip Flops applications.

  • Differential Individual
  • Parallel data storage
  • Automotive
  • Frequency Dividers
  • Patented noise
  • Buffered Clock
  • Data storage
  • Bounce elimination switch
  • High Performance Logic for test systems
  • Single Down Count-Control Line