MC10EL35DT

MC10EL35DT Overview

As a result, it is packaged as 8-TSSOP, 8-MSOP (0.118, 3.00mm Width). D flip flop is embedded in the Tube package. T flip flop uses Differentialas its output configuration. JK flip flop uses Positive Edgeas the trigger. The electronic part is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of -4.2V~-5.7V volts. In the operating environment, the temperature is -40°C~85°C TA. This electronic flip flop is of type D-Type. The 10ELseries comprises this type of FPGA. It should not exceed 2.2GHzin terms of its output frequency. Despite external influences, it consumes 32mAof quiescent current. There have been 8 terminations. The 10EL35 family contains this object. A voltage of 5V provides power to the D latch. It is mounted in the way of Surface Mount. As you can see from the design, it has pins with 8. In this device, the clock edge trigger type is Positive Edge. It is included in FF/Latches. This flip flop is designed with 2 Bits. The maximal supply voltage (Vsup) reaches 5.7V. For normal operation, the supply voltage (Vsup) should be above 4.2V. Its superior flexibility is attributed to its use of 1 circuits. Considering the reliability of this T flip flop, it is well suited for RAIL. There are -5.2V power supplies attached to it. Additionally, you may refer to the additional NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V of the electronic flip flop. 50mAis the output current at high level. The low level output current is set to 50mA.

MC10EL35DT Features

Tube package
10EL series
8 pins
2 Bits
-5.2V power supplies

MC10EL35DT Applications

There are a lot of ON Semiconductor MC10EL35DT Flip Flops applications.

• Asynchronous counter
• Circuit Design
• Shift Registers
• Memory
• Buffer registers
• Latch-up performance
• Latch
• Synchronous counter
• Test & Measurement
• ESD protection