MC10EP52DG

MC10EP52DG Overview

It is embeded in 8-SOIC (0.154, 3.90mm Width) case. D flip flop is included in the Tubepackage. It is configured with Differentialas an output. There is a trigger configured with Positive, Negative. It is mounted in the way of Surface Mount. It operates with a supply voltage of -3V~-5.5V. In this case, the operating temperature is -40°C~85°C TA. This electronic flip flop is of type D-Type. This type of FPGA is a part of the 10EP series. It should not exceed 3GHzin terms of its output frequency. It consumes 45mA of quiescent current without being affected by external factors. The number of terminations is 8. JK flip flop belongs to 10EP52 family. It is powered by a voltage of 3.3V . The electronic device belongs to the 10Efamily. Surface Mount mounts this electronic component. Basically, it is designed with a set of 8 pins. This device's clock edge trigger type is Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. An electronic part with 1bits has been designed. Vsup reaches 5.5V, the maximal supply voltage. Normally, the supply voltage (Vsup) should be above 3V. Its flexibility is enhanced by 1 circuits. On the basis of its reliable performance, this D flip flop is well suited for use with RAIL. It runs on -5.2Vvolts of power. Featuring the maximum design flexibility, it has an output current of 50mA . There is also a characteristic of NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V. A -50mAis set for the high level output current. There is no low level output current set at 50mA.

MC10EP52DG Features

Tube package
10EP series
8 pins
1 Bits
-5.2V power supplies

MC10EP52DG Applications

There are a lot of ON Semiconductor MC10EP52DG Flip Flops applications.

• QML qualified product
• Common Clocks
• Convert a momentary switch to a toggle switch
• Bounce elimination switch
• Frequency division
• ESD performance
• Bus hold
• Computers
• Power down protection
• Buffered Clock