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Shipping starts at $40, but some countries will exceed $40. For
example (South Africa, Brazil, India, Pakistan, Israel, etc.)
The
basic freight (for package ≤0.5kg or corresponding volume) depends on the time zone and
country.
Currently, our products are shipped through DHL, FedEx, SF, and UPS.
Delivery TimeOnce the goods are shipped, estimated delivery time depends on the shipping methods you chose:
FedEx International, 5-7 business days.
The following are some common countries' logistic time.Parameters | |
---|---|
Package / Case | 360-BCBGA, FCCBGA |
Surface Mount | YES |
Operating Temperature | -40°C~105°C TA |
Packaging | Tray |
Published | 1994 |
Series | MPC74xx |
Part Status | Obsolete |
Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
ECCN Code | 3A991.A.1 |
HTS Code | 8542.31.00.01 |
Technology | CMOS |
Terminal Position | BOTTOM |
Terminal Form | BALL |
Supply Voltage | 1.8V |
Base Part Number | MPC7410 |
JESD-30 Code | R-PBGA-B |
Supply Voltage-Max (Vsup) | 1.9V |
Supply Voltage-Min (Vsup) | 1.7V |
Speed | 500MHz |
uPs/uCs/Peripheral ICs Type | MICROPROCESSOR, RISC |
Core Processor | PowerPC G4 |
Boundary Scan | NO |
Low Power Mode | NO |
Format | FIXED POINT |
Integrated Cache | NO |
Voltage - I/O | 1.8V 2.5V 3.3V |
Number of Cores/Bus Width | 1 Core 32-Bit |
Graphics Acceleration | No |
RoHS Status | Non-RoHS Compliant |
The MPC7410THX500LE Host Processor is a high-performance, low-power, 32-bit processor built on Power Architecture technology with a full 128-bit implementation of Our AltiVec?? technology. This creates a microprocessor ideal for leading-edge computing, embedded network control, and signal processing applications. The MPC7410THX500LE offers the high-bandwidth MPX bus with minimized signal setup times and reduced idle cycles to increase maximum operating frequency to over 100 MHz, in addition to increased address and data bus bandwidth. To maintain compatibility with existing designs, the MPC7410THX500LE also supports the 60x bus protocol. MPC7410THX500LE microprocessors offer single-cycle double-precision floating-point performance, full symmetric multi-processing (SMP) capabilities, and support for up to 2MB of backside L2 cache.
Two integer units and Double-precision floating-point unit
Vector permute unit
Vector arithmetic logic unit
Load/store unit and System unit
Branch processing unit
Enables faster, more secure encryption methods optimized for the SIMD processing model.
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