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MPC855TVR50D4

1.27mm 3.3V 32-bit Microprocessor MPC8xx Series MPC855 3.3V 357-BBGA


  • Manufacturer: NXP USA Inc.
  • Origchip NO: 568-MPC855TVR50D4
  • Package: 357-BBGA
  • Datasheet: PDF
  • Stock: 569
  • Description: 1.27mm 3.3V 32-bit Microprocessor MPC8xx Series MPC855 3.3V 357-BBGA (Kg)

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Details

Tags

Parameters
Factory Lead Time 8 Weeks
Package / Case 357-BBGA
Surface Mount YES
Operating Temperature 0°C~95°C TA
Packaging Tray
Published 1997
Series MPC8xx
JESD-609 Code e1
Part Status Not For New Designs
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 357
ECCN Code 3A991.A.2
Terminal Finish TIN SILVER COPPER
HTS Code 8542.31.00.01
Subcategory Microprocessors
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 245
Supply Voltage 3.3V
Terminal Pitch 1.27mm
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number MPC855
JESD-30 Code S-PBGA-B357
Supply Voltage-Max (Vsup) 3.465V
Power Supplies 3.3V
Supply Voltage-Min (Vsup) 3.135V
Speed 50MHz
uPs/uCs/Peripheral ICs Type MICROPROCESSOR, RISC
Clock Frequency 50MHz
Bit Size 32
Address Bus Width 32
Boundary Scan YES
Low Power Mode YES
External Data Bus Width 32
Format FIXED POINT
Integrated Cache YES
Voltage - I/O 3.3V
Ethernet 10Mbps (1), 10/100Mbps (1)
Number of Cores/Bus Width 1 Core 32-Bit
Graphics Acceleration No
RAM Controllers DRAM
Additional Interfaces HDLC/SDLC, I2C, IrDA, PCMCIA, SPI, TDM, UART/USART
Co-Processors/DSP Communications; CPM
Height Seated (Max) 2.52mm
Length 25mm
RoHS Status ROHS3 Compliant

MPC855TVR50D4 Description


The MPC855TVR50D4 Quad Integrated Communications Controller (PowerQUICC?)is a versatile one-chip integrated microprocessor and peripheral combination designed for a variety of controller applications. It particularly excels in both communications and networking systems. The PowerQUICC unit is referred to as the MPC860 in this manual. The MPC855TVR50D4 is a derivative of Motorola’s MC68360 Quad Integrated Communications Controller (QUICC?),  referred to here as the QUICC, that implements the PowerPC architecture.  



MPC855TVR50D4 Features


Embedded single-issue, 32-bit MPC8xx core (implementing the PowerPC architecture) with thirty-two 32-bit general-purpose registers (GPRs)

Up to 32-bit data bus (dynamic bus sizing for 8, 16, and 32 bits)

Operates at up to 80 MHz

General-purpose timers - Four 16-bit timers or two 32-bit timers

ATM support compliant with ATM Forum UNI 4.0 specification



MPC855TVR50D4 Applications


Industrial 

Power delivery 

Enterprise systems 

Enterprise machine 

Personal electronics 

Tablets