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P5020NXN7VNB

PowerPC e5500 Microprocessor QorIQ P5 Series 1295-BBGA, FCBGA


  • Manufacturer: NXP USA Inc.
  • Origchip NO: 568-P5020NXN7VNB
  • Package: 1295-BBGA, FCBGA
  • Datasheet: PDF
  • Stock: 810
  • Description: PowerPC e5500 Microprocessor QorIQ P5 Series 1295-BBGA, FCBGA (Kg)

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Our sales will reply to your request by email within 24 hours.

IMPORTANT NOTICE

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2. Since inventories and prices may fluctuate to some extent, the sales manager is going to reconfirm the order and let you know if there are any updates.

Shipping Cost

Shipping starts at $40, but some countries will exceed $40. For example (South Africa, Brazil, India, Pakistan, Israel, etc.)
The basic freight (for package ≤0.5kg or corresponding volume) depends on the time zone and country.

Shipping Method

Currently, our products are shipped through DHL, FedEx, SF, and UPS.

Delivery Time

Once the goods are shipped, estimated delivery time depends on the shipping methods you chose:

FedEx International, 5-7 business days.

The following are some common countries' logistic time.
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Details

Tags

Parameters
Factory Lead Time 26 Weeks
Package / Case 1295-BBGA, FCBGA
Operating Temperature -40°C~105°C TA
Packaging Tray
Published 2002
Series QorIQ P5
Part Status Obsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Speed 2.0GHz
Core Processor PowerPC e5500
Ethernet 1Gbps (5), 10Gbps (1)
Number of Cores/Bus Width 2 Core 64-Bit
Graphics Acceleration No
RAM Controllers DDR3, DDR3L
USB USB 2.0 + PHY (2)
Additional Interfaces DUART, I2C, MMC/SD, SPI
SATA SATA 3Gbps (2)
RoHS Status ROHS3 Compliant

P5020NXN7VNB Description

The dual-core P5020 and single-core P5010 processors deliver 64-bit processing, based on the e5500 core built on Power Architecture? technology. With frequencies scalable to 2.0 GHz, large caches, and high per-cycle efficiency, these products target control planes and computer applications that require high single-threaded performance. The P5 platform leverages architectural features pioneered in the P4 platform, including the three-level cache hierarchy for low latencies, hardware hypervisor for robust virtualization support, and data path acceleration architecture (DPAA) for offloading packet handling tasks from the core, and the CoreNet? switch fabric that eliminates internal bottlenecks. This enables architectural compatibility from the P5 platform to the P4 platform as well as to the P3 platform.



P5020NXN7VNB Features

Core Complex

Single or dual 64-bit e5500 cores offered at 2.0 GHz

Three-level cache-hierarchy: 32 KB I/D L1; 512 KB private L2 per core; 2 MB shared L3

Up to 2.0 GHz with 64-bit ISA support (Power Architecture v2.06-compliant)

Three levels of instruction: user, supervisor, hypervisor

Hybrid 32-bit mode to support legacy software and transition to 64-bit architecture

2.0 MB configures as a dual 1 MB platform cache

Networking Elements

SerDes

18 lanes at up to 5 Gbps

Supports SGMII, Serial RapidIO?, XAUI, PCI Express? (PCIe) rev1.1/2.0, SATA

Ethernet interfaces

10 Gbps Ethernet MAC

Five 1 Gbps Ethernet MACs

Accelerators and memory control

Two 64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving support

Up to 1300MT/s

Frame manager for packet handling

Queue manager for policing, scheduling, and workload distribution

Security block for crypto algorithm acceleration

RAID5/6 for parity calculations in storage applications

RapidIO message manager for type 9 and 11 messaging

Pattern matching engine for regular expression searches



P5020NXN7VNB  Applications

Ethernet Switch