SCAN18374TSSC

SCAN18374TSSC Overview

The item is packaged in 56-BSSOP (0.295, 7.50mm Width)cases. You can find it in the Tubepackage. T flip flop is configured with an output of Tri-State, Non-Inverted. It is configured with a trigger that uses a value of Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. A voltage of 4.5V~5.5Vis used as the supply voltage. In this case, the operating temperature is -40°C~85°C TA. D-Typedescribes this flip flop. In FPGA terms, D flip flop is a type of SCANseries FPGA. You should not exceed 100MHzin the output frequency of the device. The element count is 2 . There is 16μA quiescent consumption. JK flip flop belongs to 18374 family. Its input capacitance is 4pFfarads. The electronic part is mounted in the way of Surface Mount. With its 56pins, it is designed to work with most electronic flip flops. This device has Positive Edgeas its clock edge trigger type. The flip flop is designed with 18bits. A high level of efficiency can be achieved by maintaining the supply voltage at 5V. In order for the chip to function, it has 9output lines.

SCAN18374TSSC Features

Tube package
SCAN series
56 pins
18 Bits

SCAN18374TSSC Applications

There are a lot of ON Semiconductor SCAN18374TSSC Flip Flops applications.

• Buffer registers
• ATE
• Single Down Count-Control Line
• Frequency Dividers
• Differential Individual
• Shift registers
• Storage registers
• Common Clocks
• ESD performance
• Data Synchronizers