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  • SN74AHCT374DW

SN74AHCT374DW

4.5V~5.5V 130MHz 8 Bit D-Type Flip Flop DUAL 74AHCT374 20 Pins 4μA 74AHCT Series 20-SOIC (0.295, 7.50mm Width)


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-SN74AHCT374DW
  • Package: 20-SOIC (0.295, 7.50mm Width)
  • Datasheet: -
  • Stock: 552
  • Description: 4.5V~5.5V 130MHz 8 Bit D-Type Flip Flop DUAL 74AHCT374 20 Pins 4μA 74AHCT Series 20-SOIC (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 6 Weeks
Lifecycle Status ACTIVE (Last Updated: 5 days ago)
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 20-SOIC (0.295, 7.50mm Width)
Number of Pins 20
Weight 500.709277mg
Operating Temperature -40°C~85°C TA
Packaging Tube
Series 74AHCT
JESD-609 Code e4
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Type D-Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory FF/Latches
Technology CMOS
Voltage - Supply 4.5V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 5V
Base Part Number 74AHCT374
Function Standard
Output Type Tri-State, Non-Inverted
Operating Supply Voltage 5V
Number of Elements 1
Polarity Non-Inverting
Power Supplies 5V
Number of Circuits 8
Load Capacitance 50pF
Number of Ports 2
Output Current 8mA
Number of Bits 8
Clock Frequency 130MHz
Propagation Delay 10.4 ns
Turn On Delay Time 1 ns
Family AHCT/VHCT/VT
Logic Function D-Type, Flip-Flop
Current - Quiescent (Iq) 4μA
Current - Output High, Low 8mA 8mA
Max Propagation Delay @ V, Max CL 10.4ns @ 5V, 50pF
Trigger Type Positive Edge
Input Capacitance 4pF
Power Supply Current-Max (ICC) 0.04mA
Number of Input Lines 3
Count Direction UNIDIRECTIONAL
Clock Edge Trigger Type Positive Edge
Max Frequency@Nom-Sup 75000000Hz
Height 2.65mm
Length 12.8mm
Width 7.5mm
Thickness 2.35mm
Radiation Hardening No
REACH SVHC No SVHC
RoHS Status ROHS3 Compliant
Lead Free Lead Free

SN74AHCT374DW Overview


20-SOIC (0.295, 7.50mm Width)is the way it is packaged. The package Tubecontains it. Currently, the output is configured to use Tri-State, Non-Inverted. The trigger it is configured with uses Positive Edge. Surface Mountis occupied by this electronic component. Powered by a 4.5V~5.5Vvolt supply, it operates as follows. In this case, the operating temperature is -40°C~85°C TA. This D latch has the type D-Type. FPGAs belonging to the 74AHCTseries contain this type of chip. Its output frequency should not exceed 130MHz Hz. In total, it contains 1 elements. As a result, it consumes 4μA quiescent current and is not affected by external forces. In 20terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. If you search by 74AHCT374, you will find similar parts. Power is supplied from a voltage of 5V volts. The input capacitance of this T flip flop is 4pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. This D flip flop belongs to the family of AHCT/VHCT/VT. There is an electronic component mounted in the way of Surface Mount. Basically, it is designed with a set of 20 pins. This device has the clock edge trigger type of Positive Edge. The RS flip flops belongs to FF/Latches base part number. It is designed with a number of bits of 8. 8 circuits are used to achieve its superior flexibility. It operates from 5V power supplies. There are 2 ports embedded in the flip flops. Optimal efficiency requires a supply voltage of 5V. In addition to its maximum design flexibility, the output current of the T flip flop is 8mA. It is reported that there are 3 input lines.

SN74AHCT374DW Features


Tube package
74AHCT series
20 pins
8 Bits
5V power supplies

SN74AHCT374DW Applications


There are a lot of Texas Instruments SN74AHCT374DW Flip Flops applications.

  • Individual Asynchronous Resets
  • Instrumentation
  • EMI reduction circuitry
  • Latch-up performance
  • ESCC
  • Guaranteed simultaneous switching noise level
  • Bounce elimination switch
  • Set-reset capability
  • Divide a clock signal by 2 or 4
  • Parallel data storage