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SN74ALS112ANSR

4.5V~5.5V 30MHz JK Type Flip Flop DUAL 74ALS112 16 Pins 4.5mA 74ALS Series 16-SOIC (0.209, 5.30mm Width)


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-SN74ALS112ANSR
  • Package: 16-SOIC (0.209, 5.30mm Width)
  • Datasheet: -
  • Stock: 747
  • Description: 4.5V~5.5V 30MHz JK Type Flip Flop DUAL 74ALS112 16 Pins 4.5mA 74ALS Series 16-SOIC (0.209, 5.30mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 6 Weeks
Lifecycle Status ACTIVE (Last Updated: 1 week ago)
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 16-SOIC (0.209, 5.30mm Width)
Number of Pins 16
Weight 200.686274mg
Operating Temperature 0°C~70°C TA
Packaging Tape & Reel (TR)
Series 74ALS
JESD-609 Code e4
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 16
ECCN Code EAR99
Type JK Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory FF/Latches
Packing Method TR
Technology TTL
Voltage - Supply 4.5V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 5V
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number 74ALS112
Function Set(Preset) and Reset
Qualification Status Not Qualified
Output Type Differential
Operating Supply Voltage 5V
Polarity Non-Inverting
Power Supplies 5V
Number of Circuits 2
Output Current 8mA
Clock Frequency 30MHz
Propagation Delay 19 ns
Turn On Delay Time 3 ns
Family ALS
Logic Function AND, Flip-Flop, JK-Type
Current - Quiescent (Iq) 4.5mA
Current - Output High, Low 400μA 8mA
Max I(ol) 0.008 A
Number of Bits per Element 1
Max Propagation Delay @ V, Max CL 19ns @ 5V, 50pF
Trigger Type Negative Edge
Schmitt Trigger No
Number of Input Lines 5
fmax-Min 30 MHz
Clock Edge Trigger Type Negative Edge
Max Frequency@Nom-Sup 30000000Hz
Height 2mm
Length 10.3mm
Width 5.3mm
Thickness 1.95mm
RoHS Status ROHS3 Compliant
Lead Free Lead Free

SN74ALS112ANSR Overview


The flip flop is packaged in a case of 16-SOIC (0.209, 5.30mm Width). D flip flop is included in the Tape & Reel (TR)package. Currently, the output is configured to use Differential. JK flip flop uses Negative Edgeas the trigger. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates at 4.5V~5.5Vvolts. Temperature is set to 0°C~70°C TA. Logic flip flops of this type are classified as JK Type. This type of FPGA is a part of the 74ALS series. There should be no greater frequency than 30MHzon its output. There is a consumption of 4.5mAof quiescent energy. Currently, there are 16 terminations. The 74ALS112 family contains it. Power is supplied from a voltage of 5V volts. In this case, the D flip flop belongs to the ALSfamily. It is mounted by the way of Surface Mount. 16pins are included in its design. This device has the clock edge trigger type of Negative Edge. This device is part of the FF/Latchesbase part number family. Its superior flexibility is attributed to its use of 2 circuits. Considering its reliability, this T flip flop is well suited for TR. The system runs on a power supply of 5V watts. In order to ensure high efficiency, the supply voltage should remain at 5V. In addition to its maximum design flexibility, the output current of the T flip flop is 8mA. Currently, there are 5 input lines present.

SN74ALS112ANSR Features


Tape & Reel (TR) package
74ALS series
16 pins
5V power supplies

SN74ALS112ANSR Applications


There are a lot of Texas Instruments SN74ALS112ANSR Flip Flops applications.

  • Shift registers
  • Consumer
  • Shift Registers
  • Single Down Count-Control Line
  • EMI reduction circuitry
  • Functionally equivalent to the MC10/100EL29
  • Storage Registers
  • Count Modes
  • Individual Asynchronous Resets
  • Event Detectors