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  • SN74ALVCH16721DGGR

SN74ALVCH16721DGGR

1.65V~3.6V 150MHz 20 Bit D-Type Flip Flop DUAL 74ALVCH16721 56 Pins 74ALVCH Series 56-TFSOP (0.240, 6.10mm Width)


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-SN74ALVCH16721DGGR
  • Package: 56-TFSOP (0.240, 6.10mm Width)
  • Datasheet: PDF
  • Stock: 493
  • Description: 1.65V~3.6V 150MHz 20 Bit D-Type Flip Flop DUAL 74ALVCH16721 56 Pins 74ALVCH Series 56-TFSOP (0.240, 6.10mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 6 Weeks
Lifecycle Status ACTIVE (Last Updated: 14 hours ago)
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 56-TFSOP (0.240, 6.10mm Width)
Number of Pins 56
Weight 252.792698mg
Operating Temperature -40°C~85°C TA
Packaging Cut Tape (CT)
Series 74ALVCH
JESD-609 Code e4
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 56
ECCN Code EAR99
Type D-Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Additional Feature WITH CLOCK ENABLE
Subcategory FF/Latches
Packing Method TR
Technology CMOS
Voltage - Supply 1.65V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.8V
Terminal Pitch 0.5mm
Base Part Number 74ALVCH16721
Function Standard
Output Type Tri-State, Non-Inverted
Operating Supply Voltage 3.3V
Number of Elements 1
Polarity Non-Inverting
Number of Channels 20
Load Capacitance 50pF
Number of Ports 2
Output Current 24mA
Number of Bits 20
Clock Frequency 150MHz
Propagation Delay 5.1 ns
Quiescent Current 40μA
Turn On Delay Time 1 ns
Family ALVC/VCX/A
Logic Function D-Type, Flip-Flop
Current - Output High, Low 24mA 24mA
Max I(ol) 0.024 A
Max Propagation Delay @ V, Max CL 4.3ns @ 3.3V, 30pF
Trigger Type Positive Edge
Input Capacitance 3.5pF
Power Supply Current-Max (ICC) 0.04mA
Number of Input Lines 1
Number of Output Lines 3
Count Direction UNIDIRECTIONAL
Clock Edge Trigger Type Positive Edge
Translation N/A
Height 1.2mm
Length 14mm
Width 6.1mm
Thickness 1.15mm
Radiation Hardening No
RoHS Status ROHS3 Compliant
Lead Free Lead Free

SN74ALVCH16721DGGR Overview


56-TFSOP (0.240, 6.10mm Width)is the packaging method. D flip flop is included in the Cut Tape (CT)package. Tri-State, Non-Invertedis the output configured for it. Positive Edgeis the trigger it is configured with. The electronic part is mounted in the way of Surface Mount. A voltage of 1.65V~3.6Vis required for its operation. It is operating at a temperature of -40°C~85°C TA. D-Typedescribes this flip flop. In FPGA terms, D flip flop is a type of 74ALVCHseries FPGA. It should not exceed 150MHzin terms of its output frequency. The list contains 1 elements. The number of terminations is 56. D latch belongs to the 74ALVCH16721 family. A voltage of 1.8V is used as the power supply for this D latch. A JK flip flop with a 3.5pFfarad input capacitance is used here. In terms of electronic devices, this device belongs to the ALVC/VCX/Afamily of devices. The electronic part is mounted in the way of Surface Mount. This board has 56 pins. It has a clock edge trigger type of Positive Edge. It is included in FF/Latches. There are 20bits in this flip flop. Considering the reliability of this T flip flop, it is well suited for TR. There are 2 ports embedded in the flip flops. For high efficiency, the supply voltage should be kept at 3.3V. Its output current of 24mAallows for maximum design flexibility. There are no output lines on the JK flip flop. 1input lines are available for you to choose from. It consumes 40μA of quiescent current without being affected by external factors. Additionally, it is characterized by WITH CLOCK ENABLE. Currently, there are 20 channels available.

SN74ALVCH16721DGGR Features


Cut Tape (CT) package
74ALVCH series
56 pins
20 Bits

SN74ALVCH16721DGGR Applications


There are a lot of Texas Instruments SN74ALVCH16721DGGR Flip Flops applications.

  • Counters
  • EMI reduction circuitry
  • Set-reset capability
  • Modulo – n – counter
  • QML qualified product
  • Buffered Clock
  • Control circuits
  • Matched Rise and Fall
  • ESD protection
  • Supports Live Insertion