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SN74ALVCH16820DL

1.65V~3.6V 150MHz D-Type Flip Flop DUAL 40μA 74ALVCH Series 56-BSSOP (0.295, 7.50mm Width)


  • Manufacturer: Rochester Electronics, LLC
  • Origchip NO: 699-SN74ALVCH16820DL
  • Package: 56-BSSOP (0.295, 7.50mm Width)
  • Datasheet: PDF
  • Stock: 369
  • Description: 1.65V~3.6V 150MHz D-Type Flip Flop DUAL 40μA 74ALVCH Series 56-BSSOP (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 56-BSSOP (0.295, 7.50mm Width)
Surface Mount YES
Operating Temperature -40°C~85°C TA
Packaging Tube
Series 74ALVCH
JESD-609 Code e4
Pbfree Code yes
Part Status Obsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 56
Type D-Type
Terminal Finish NICKEL PALLADIUM GOLD
Technology CMOS
Voltage - Supply 1.65V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.8V
Terminal Pitch 0.635mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
JESD-30 Code R-PDSO-G56
Function Standard
Output Type Tri-State, Non-Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 3.6V
Number of Ports 2
Clock Frequency 150MHz
Family ALVC/VCX/A
Current - Quiescent (Iq) 40μA
Output Characteristics 3-STATE
Current - Output High, Low 24mA 24mA
Output Polarity TRUE
Number of Bits per Element 10
Max Propagation Delay @ V, Max CL 4.8ns @ 3.3V, 50pF
Trigger Type Positive Edge
Input Capacitance 3.5pF
Propagation Delay (tpd) 5.9 ns
Height Seated (Max) 2.79mm
Width 7.49mm
RoHS Status ROHS3 Compliant

SN74ALVCH16820DL Overview


56-BSSOP (0.295, 7.50mm Width)is the way it is packaged. A package named Tubeincludes it. Tri-State, Non-Invertedis the output configured for it. The trigger configured with it uses Positive Edge. This electronic part is mounted in the way of Surface Mount. A voltage of 1.65V~3.6Vis used as the supply voltage. It is operating at a temperature of -40°C~85°C TA. This D latch has the type D-Type. It belongs to the 74ALVCHseries of FPGAs. Its output frequency should not exceed 150MHz. There are 1 elements in it. As a result, it consumes 40μA of quiescent current without being affected by external factors. It has been determined that there have been 56 terminations. Power is supplied from a voltage of 1.8V volts. The input capacitance of this T flip flop is 3.5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. ALVC/VCX/Ais the family of this D flip flop. As soon as 3.6Vis reached, Vsup reaches its maximum value. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.

SN74ALVCH16820DL Features


Tube package
74ALVCH series

SN74ALVCH16820DL Applications


There are a lot of Rochester Electronics, LLC SN74ALVCH16820DL Flip Flops applications.

  • ATE
  • Communications
  • Matched Rise and Fall
  • Guaranteed simultaneous switching noise level
  • Frequency Dividers
  • Frequency Divider circuits
  • Safety Clamp
  • Parallel data storage
  • Supports Live Insertion
  • CMOS Process