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  • SN74AUCH16374GQLR

SN74AUCH16374GQLR

0.8V~2.7V 250MHz 16 Bit D-Type Flip Flop BOTTOM 74AUCH16374 56 Pins 20μA 74AUCH Series 56-VFBGA


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-SN74AUCH16374GQLR
  • Package: 56-VFBGA
  • Datasheet: PDF
  • Stock: 607
  • Description: 0.8V~2.7V 250MHz 16 Bit D-Type Flip Flop BOTTOM 74AUCH16374 56 Pins 20μA 74AUCH Series 56-VFBGA(Kg)

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Details

Tags

Parameters
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 56-VFBGA
Number of Pins 56
Weight 58.796911mg
Operating Temperature -40°C~85°C TA
Packaging Cut Tape (CT)
Series 74AUCH
JESD-609 Code e0
Pbfree Code no
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 56
Type D-Type
Terminal Finish Tin/Lead (Sn/Pb)
Subcategory FF/Latches
Packing Method TAPE AND REEL
Technology CMOS
Voltage - Supply 0.8V~2.7V
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 240
Supply Voltage 1.2V
Terminal Pitch 0.65mm
Reach Compliance Code not_compliant
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number 74AUCH16374
Function Standard
Qualification Status Not Qualified
Output Type Tri-State, Non-Inverted
Number of Elements 2
Polarity Non-Inverting
Load Capacitance 15pF
Number of Ports 2
Number of Bits 16
Clock Frequency 250MHz
Propagation Delay 2.8 ns
Turn On Delay Time 7.3 ns
Family AUC
Logic Function D-Type, Flip-Flop
Current - Quiescent (Iq) 20μA
Output Characteristics 3-STATE
Current - Output High, Low 9mA 9mA
Max I(ol) 0.005 A
Max Propagation Delay @ V, Max CL 2.2ns @ 2.5V, 30pF
Prop. Delay@Nom-Sup 4.5 ns
Trigger Type Positive Edge
Input Capacitance 3pF
Number of Output Lines 8
Clock Edge Trigger Type Positive Edge
Height Seated (Max) 1mm
Length 7mm
Width 4.5mm
RoHS Status ROHS3 Compliant
Lead Free Contains Lead

SN74AUCH16374GQLR Overview


The package is in the form of 56-VFBGA. D flip flop is included in the Cut Tape (CT)package. Tri-State, Non-Invertedis the output configured for it. It is configured with the trigger Positive Edge. Surface Mountis in the way of this electric part. The JK flip flop operates at a voltage of 0.8V~2.7V. Currently, the operating temperature is -40°C~85°C TA. This D latch has the type D-Type. In FPGA terms, D flip flop is a type of 74AUCHseries FPGA. A frequency of 250MHzshould be the maximum output frequency. A total of 2 elements are present. There is a consumption of 20μAof quiescent energy. A total of 56 terminations have been made. The 74AUCH16374 family contains this object. Power is supplied from a voltage of 1.2V volts. Input capacitance of this device is 3pF farads. It is a member of the AUCfamily of D flip flop. The electronic part is mounted in the way of Surface Mount. A total of 56pins are provided on this board. This device exhibits a clock edge trigger type of Positive Edge. It is included in FF/Latches. It is designed with 16bits. Considering the reliability of this T flip flop, it is well suited for TAPE AND REEL. There are 2 ports embedded in the flip flops. It is designed with 8 output lines.

SN74AUCH16374GQLR Features


Cut Tape (CT) package
74AUCH series
56 pins
16 Bits

SN74AUCH16374GQLR Applications


There are a lot of Texas Instruments SN74AUCH16374GQLR Flip Flops applications.

  • Modulo – n – counter
  • Digital electronics systems
  • Individual Asynchronous Resets
  • Parallel data storage
  • Buffer registers
  • Storage registers
  • Shift registers
  • Event Detectors
  • Data storage
  • Control circuits