SN74AUP2G80DQER

SN74AUP2G80DQER Overview

It is packaged in the way of 8-XFDFN. D flip flop is embedded in the Tape & Reel (TR) package. T flip flop uses Invertedas the output. This trigger is configured to use Positive Edge. The electronic part is mounted in the way of Surface Mount. A supply voltage of 0.8V~3.6V is required for operation. It is at -40°C~85°C TAdegrees Celsius that the system is operating. Logic flip flops of this type are classified as D-Type. This type of FPGA is a part of the 74AUP series. You should not exceed 257MHzin its output frequency. A total of 8terminations have been recorded. D latch belongs to the 74AUP2G80 family. A voltage of 1.2V provides power to the D latch. A 1.5pFfarad input capacitance is provided by this T flip flop. It is a member of the AUP/ULP/Vfamily of D flip flop. In this case, the electronic component is mounted in the way of Surface Mount. This board has 8 pins. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. It is included in FF/Latches. It reaches 3.6Vwhen the maximum supply voltage (Vsup) is applied. This D flip flop is well suited for TR based on its reliable performance. Despite external influences, it consumes 500nAof quiescent current. There are 2 gates in its basic building block.

SN74AUP2G80DQER Features

Tape & Reel (TR) package
74AUP series
8 pins
2 gates

SN74AUP2G80DQER Applications

There are a lot of Texas Instruments SN74AUP2G80DQER Flip Flops applications.

• Registers
• Modulo – n – counter
• Frequency Dividers
• Guaranteed simultaneous switching noise level
• Buffer registers
• Individual Asynchronous Resets
• Computing
• Test & Measurement
• Clock pulse
• Shift Registers