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  • SN74LVC112ADR

SN74LVC112ADR

1.65V~3.6V 150MHz JK Type Flip Flop DUAL 74LVC112 16 Pins 10μA 74LVC Series 16-SOIC (0.154, 3.90mm Width)


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-SN74LVC112ADR
  • Package: 16-SOIC (0.154, 3.90mm Width)
  • Datasheet: -
  • Stock: 168
  • Description: 1.65V~3.6V 150MHz JK Type Flip Flop DUAL 74LVC112 16 Pins 10μA 74LVC Series 16-SOIC (0.154, 3.90mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 6 Weeks
Lifecycle Status ACTIVE (Last Updated: 4 days ago)
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 16-SOIC (0.154, 3.90mm Width)
Number of Pins 16
Weight 141.690917mg
Operating Temperature -40°C~85°C TA
Packaging Tape & Reel (TR)
Series 74LVC
JESD-609 Code e4
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 16
ECCN Code EAR99
Type JK Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory FF/Latches
Packing Method TR
Technology CMOS
Voltage - Supply 1.65V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.8V
Base Part Number 74LVC112
Function Set(Preset) and Reset
Output Type Differential
Polarity Non-Inverting
Supply Voltage-Min (Vsup) 2V
Number of Circuits 2
Load Capacitance 50pF
Output Current 24mA
Clock Frequency 150MHz
Propagation Delay 7.1 ns
Turn On Delay Time 1 ns
Family LVC/LCX/Z
Logic Function AND, Flip-Flop, JK-Type
Current - Quiescent (Iq) 10μA
Current - Output High, Low 24mA 24mA
Number of Bits per Element 1
Max Propagation Delay @ V, Max CL 5.9ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 4.8 ns
Trigger Type Negative Edge
Input Capacitance 4.5pF
Schmitt Trigger No
Number of Input Lines 3
Clock Edge Trigger Type Negative Edge
Height 1.75mm
Length 9.9mm
Width 3.91mm
Thickness 1.58mm
Radiation Hardening No
RoHS Status ROHS3 Compliant
Lead Free Lead Free

SN74LVC112ADR Overview


16-SOIC (0.154, 3.90mm Width)is the packaging method. Package Tape & Reel (TR)embeds it. As configured, the output uses Differential. Negative Edgeis the trigger it is configured with. There is an electronic component mounted in the way of Surface Mount. Powered by a 1.65V~3.6Vvolt supply, it operates as follows. In this case, the operating temperature is -40°C~85°C TA. JK Typedescribes this flip flop. In this case, it is a type of FPGA belonging to the 74LVC series. This D flip flop should not have a frequency greater than 150MHz. It consumes 10μA of quiescent 16terminations have occurred. The 74LVC112family includes it. The power source is powered by 1.8V. Input capacitance of this device is 4.5pF farads. LVC/LCX/Zis the family of this D flip flop. Electronic part Surface Mountis mounted in the way. There are 16pins on it. This device has Negative Edgeas its clock edge trigger type. It is part of the FF/Latchesbase part number family. Normally, the supply voltage (Vsup) should be kept above 2V. In order to achieve its superior flexibility, 2 circuits are used. As a result of its reliability, this D flip flop is ideally suited for TR. Featuring the maximum design flexibility, it has an output current of 24mA . Currently, there are 3 lines of input.

SN74LVC112ADR Features


Tape & Reel (TR) package
74LVC series
16 pins

SN74LVC112ADR Applications


There are a lot of Texas Instruments SN74LVC112ADR Flip Flops applications.

  • Balanced 24 mA output drivers
  • Synchronous counter
  • Frequency division
  • Individual Asynchronous Resets
  • Registers
  • Cold spare funcion
  • 2 – Bit synchronous counter
  • Patented noise
  • Bus hold
  • Computing