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SN74LVC112ADT

1.65V~3.6V 150MHz JK Type Flip Flop DUAL 74LVC112 16 Pins 10μA 74LVC Series 16-SOIC (0.154, 3.90mm Width)


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-SN74LVC112ADT
  • Package: 16-SOIC (0.154, 3.90mm Width)
  • Datasheet: -
  • Stock: 101
  • Description: 1.65V~3.6V 150MHz JK Type Flip Flop DUAL 74LVC112 16 Pins 10μA 74LVC Series 16-SOIC (0.154, 3.90mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 6 Weeks
Lifecycle Status ACTIVE (Last Updated: 2 days ago)
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 16-SOIC (0.154, 3.90mm Width)
Number of Pins 16
Weight 141.690917mg
Operating Temperature -40°C~85°C TA
Packaging Tape & Reel (TR)
Series 74LVC
JESD-609 Code e4
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 16
Termination SMD/SMT
ECCN Code EAR99
Type JK Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory FF/Latches
Packing Method TR
Technology CMOS
Voltage - Supply 1.65V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.8V
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number 74LVC112
Function Set(Preset) and Reset
Qualification Status Not Qualified
Output Type Differential
Polarity Non-Inverting
Supply Voltage-Min (Vsup) 2V
Number of Circuits 2
Load Capacitance 50pF
Output Current 24mA
Clock Frequency 150MHz
Propagation Delay 7.1 ns
Turn On Delay Time 1 ns
Family LVC/LCX/Z
Logic Function AND, Flip-Flop, JK-Type
Current - Quiescent (Iq) 10μA
Current - Output High, Low 24mA 24mA
Number of Bits per Element 1
Max Propagation Delay @ V, Max CL 5.9ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 4.8 ns
Trigger Type Negative Edge
Input Capacitance 4.5pF
Schmitt Trigger No
Number of Input Lines 3
Clock Edge Trigger Type Negative Edge
Height 1.75mm
Length 9.9mm
Width 3.91mm
Thickness 1.58mm
REACH SVHC No SVHC
RoHS Status ROHS3 Compliant
Lead Free Lead Free

SN74LVC112ADT Overview


It is embeded in 16-SOIC (0.154, 3.90mm Width) case. There is an embedded version in the package Tape & Reel (TR). T flip flop uses Differentialas the output. Negative Edgeis the trigger it is configured with. There is an electronic component mounted in the way of Surface Mount. The JK flip flop operates at 1.65V~3.6Vvolts. Temperature is set to -40°C~85°C TA. It belongs to the type JK Typeof flip flops. The 74LVCseries comprises this type of FPGA. Its output frequency should not exceed 150MHz. There is 10μA quiescent consumption. Currently, there are 16 terminations. The 74LVC112 family contains it. It is powered by a voltage of 1.8V . Its input capacitance is 4.5pF farads. LVC/LCX/Zis the family of this D flip flop. Electronic part Surface Mountis mounted in the way. With its 16pins, it is designed to work with most electronic flip flops. Its clock edge trigger type is Negative Edge. This part is included in FF/Latches. Normally, the supply voltage (Vsup) should be kept above 2V. Despite its superior flexibility, it relies on 2 circuits to achieve it. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TR. As a result of its output current of 24mA, it is very flexible in terms of design. A total of 3input lines have been provided.

SN74LVC112ADT Features


Tape & Reel (TR) package
74LVC series
16 pins

SN74LVC112ADT Applications


There are a lot of Texas Instruments SN74LVC112ADT Flip Flops applications.

  • High Performance Logic for test systems
  • Single Up Count-Control Line
  • ESD performance
  • Differential Individual
  • CMOS Process
  • Convert a momentary switch to a toggle switch
  • Computers
  • Bus hold
  • Safety Clamp
  • QML qualified product