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  • SN74LVC374APW

SN74LVC374APW

1.65V~3.6V 100MHz D-Type Flip Flop DUAL 74LVC374 20 Pins 10μA 74LVC Series 20-TSSOP (0.173, 4.40mm Width)


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-SN74LVC374APW
  • Package: 20-TSSOP (0.173, 4.40mm Width)
  • Datasheet: -
  • Stock: 685
  • Description: 1.65V~3.6V 100MHz D-Type Flip Flop DUAL 74LVC374 20 Pins 10μA 74LVC Series 20-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 6 Weeks
Lifecycle Status ACTIVE (Last Updated: 2 days ago)
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 20-TSSOP (0.173, 4.40mm Width)
Number of Pins 20
Weight 76.997305mg
Operating Temperature -40°C~85°C TA
Packaging Tube
Series 74LVC
JESD-609 Code e4
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Termination SMD/SMT
ECCN Code EAR99
Type D-Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory FF/Latches
Technology CMOS
Voltage - Supply 1.65V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.8V
Terminal Pitch 0.65mm
Base Part Number 74LVC374
Function Standard
Output Type Tri-State, Non-Inverted
Operating Supply Voltage 3.3V
Number of Elements 1
Polarity Non-Inverting
Number of Channels 2
Load Capacitance 50pF
Number of Ports 2
Output Current 24mA
Clock Frequency 100MHz
Propagation Delay 8.5 ns
Turn On Delay Time 1.5 ns
Family LVC/LCX/Z
Logic Function D-Type, Flip-Flop
Current - Quiescent (Iq) 10μA
Current - Output High, Low 24mA 24mA
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 7ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 7 ns
Trigger Type Positive Edge
Input Capacitance 4pF
Number of Input Lines 3
Count Direction UNIDIRECTIONAL
Clock Edge Trigger Type Positive Edge
Height 1.2mm
Length 6.5mm
Width 4.4mm
Thickness 1mm
Radiation Hardening No
REACH SVHC No SVHC
RoHS Status ROHS3 Compliant
Lead Free Lead Free

SN74LVC374APW Overview


The flip flop is packaged in a case of 20-TSSOP (0.173, 4.40mm Width). Package Tubeembeds it. This output is configured with Tri-State, Non-Inverted. JK flip flop uses Positive Edgeas the trigger. Surface Mountis positioned in the way of this electronic part. Powered by a 1.65V~3.6Vvolt supply, it operates as follows. Currently, the operating temperature is -40°C~85°C TA. It belongs to the type D-Typeof flip flops. JK flip flop belongs to the 74LVCseries of FPGAs. It should not exceed 100MHzin its output frequency. D latch consists of 1 elements. As a result, it consumes 10μA quiescent current. The number of terminations is 20. The 74LVC374family includes it. Power is provided by a 1.8V supply. This T flip flop has a capacitance of 4pF farads at the input. This D flip flop belongs to the family of LVC/LCX/Z. It is mounted in the way of Surface Mount. This board is designed with 20pins on it. This device has the clock edge trigger type of Positive Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. A D flip flop with 2embedded ports is available. For high efficiency, the supply voltage should be kept at 3.3V. It offers maximum design flexibility with its output current of 24mA. 3input lines are available for you to choose from. There are 2 channels available.

SN74LVC374APW Features


Tube package
74LVC series
20 pins

SN74LVC374APW Applications


There are a lot of Texas Instruments SN74LVC374APW Flip Flops applications.

  • Shift registers
  • Clock pulse
  • High Performance Logic for test systems
  • Bounce elimination switch
  • Common Clocks
  • Data transfer
  • Frequency division
  • Patented noise
  • Supports Live Insertion
  • Automotive