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SN74LVTH374NSR

2.7V~3.6V 150MHz 8 Bit D-Type Flip Flop DUAL 74LVTH374 20 Pins 190μA 74LVTH Series 20-SOIC (0.209, 5.30mm Width)


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-SN74LVTH374NSR
  • Package: 20-SOIC (0.209, 5.30mm Width)
  • Datasheet: -
  • Stock: 713
  • Description: 2.7V~3.6V 150MHz 8 Bit D-Type Flip Flop DUAL 74LVTH374 20 Pins 190μA 74LVTH Series 20-SOIC (0.209, 5.30mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 6 Weeks
Lifecycle Status ACTIVE (Last Updated: 1 week ago)
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 20-SOIC (0.209, 5.30mm Width)
Number of Pins 20
Weight 266.712314mg
Operating Temperature -40°C~85°C TA
Packaging Tape & Reel (TR)
Series 74LVTH
JESD-609 Code e4
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Type D-Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory FF/Latches
Packing Method TR
Technology BICMOS
Voltage - Supply 2.7V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number 74LVTH374
Function Standard
Qualification Status Not Qualified
Output Type Tri-State, Non-Inverted
Operating Supply Voltage 3.3V
Number of Elements 1
Polarity Non-Inverting
Supply Voltage-Min (Vsup) 2.7V
Number of Circuits 8
Load Capacitance 50pF
Number of Ports 2
Output Current 64mA
Number of Bits 8
Clock Frequency 150MHz
Propagation Delay 2.9 ns
Turn On Delay Time 2.9 ns
Family LVT
Logic Function D-Type, Flip-Flop
Current - Quiescent (Iq) 190μA
Current - Output High, Low 32mA 64mA
Max I(ol) 0.064 A
Max Propagation Delay @ V, Max CL 4.5ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 4.5 ns
Trigger Type Positive Edge
Input Capacitance 3pF
Power Supply Current-Max (ICC) 5mA
Number of Output Lines 3
Count Direction UNIDIRECTIONAL
Clock Edge Trigger Type Positive Edge
Translation N/A
Height 2mm
Length 12.6mm
Width 5.3mm
Thickness 1.95mm
RoHS Status ROHS3 Compliant
Lead Free Lead Free

SN74LVTH374NSR Overview


The flip flop is packaged in a case of 20-SOIC (0.209, 5.30mm Width). D flip flop is embedded in the Tape & Reel (TR) package. There is a Tri-State, Non-Invertedoutput configured with it. There is a trigger configured with Positive Edge. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates at a voltage of 2.7V~3.6V. In this case, the operating temperature is -40°C~85°C TA. The type of this D latch is D-Type. It belongs to the 74LVTHseries of FPGAs. You should not exceed 150MHzin the output frequency of the device. D latch consists of 1 elements. It consumes 190μA of quiescent 20terminations have occurred. You can search similar parts based on 74LVTH374. Power is provided by a 3.3V supply. The input capacitance of this JK flip flopis 3pF farads. Electronic devices of this type belong to the LVTfamily. Electronic part Surface Mountis mounted in the way. It is designed with 20 pins. A Positive Edgeclock edge trigger is used in this device. This device is part of the FF/Latchesbase part number family. It is designed with a number of bits of 8. It is imperative that the supply voltage (Vsup) is maintained above 2.7Vin order to ensure normal operation. Its superior flexibility is attributed to its use of 8 circuits. In view of its reliability, this D flip flop is a good fit for TR. The flip flop contains 2ports. For high efficiency, the supply voltage should be kept at 3.3V. Its output current of 64mAallows for maximum design flexibility. There are 3 output Lines, which generate the binary equivalent of the input line whose value is equal to “1” and are available to encode either a decimal or hexadecimal input pattern to typically a binary or “B. C. D” (binary coded decimal) output code.

SN74LVTH374NSR Features


Tape & Reel (TR) package
74LVTH series
20 pins
8 Bits

SN74LVTH374NSR Applications


There are a lot of Texas Instruments SN74LVTH374NSR Flip Flops applications.

  • Registers
  • Pattern generators
  • Automotive
  • Shift Registers
  • Consumer
  • High Performance Logic for test systems
  • Bus hold
  • Reduced system switching noise
  • Bounce elimination switch
  • Control circuits