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  • XC9536-10CS48I

XC9536-10CS48I

PMIC 5V


  • Manufacturer: Xilinx
  • Origchip NO: 903-XC9536-10CS48I
  • Package: -
  • Datasheet: -
  • Stock: 939
  • Description: PMIC 5V (Kg)

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Details

Tags

Parameters
Surface Mount YES
JESD-609 Code e0
Pbfree Code no
Moisture Sensitivity Level (MSL) 3
Number of Terminations 48
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn63Pb37)
Additional Feature YES
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 240
Supply Voltage 5V
Reach Compliance Code not_compliant
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 48
Qualification Status Not Qualified
Operating Temperature (Min) -40°C
Operating Supply Voltage 5V
Temperature Grade INDUSTRIAL
Number of I/O 34
Clock Frequency 66.7MHz
Propagation Delay 10 ns
Organization 0 DEDICATED INPUTS, 34 I/O
Programmable Logic Type FLASH PLD
Number of Logic Blocks (LABs) 8
Output Function MACROCELL
Number of Macro Cells 36
JTAG BST YES
In-System Programmable YES
Length 7mm
Width 7mm
RoHS Status Non-RoHS Compliant

XC9536-10CS48I Overview


There are 36 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).The device is programmed with 34 I/Os.There is a 48terminations set on devices.This electrical component has a terminal position of 0.There is 5V voltage supply for this device.There is a part in the family [0].In this chip, the 48pins are programmed.This device is also capable of displaying [0].If high efficiency is to be achieved, the supply voltage should be maintained at [0].There are 8logic blocks (LABs) that make up its basic building block.It should not exceed 66.7MHzin terms of clockfrequency.Programmable logic types can be divided into FLASH PLD.It should be at least -40°Cduring operation.

XC9536-10CS48I Features


34 I/Os
48 pin count
8 logic blocks (LABs)

XC9536-10CS48I Applications


There are a lot of Xilinx XC9536-10CS48I CPLDs applications.

  • ToR/Aggregation/Core Switch and Router
  • Power Meter SMPS
  • Pattern recognition
  • SUPERVISORY FUNCTION (LVD AND WATCHDOG)
  • Field programmable gate
  • Configurable Addressing of I/O Boards
  • Complex programmable logic devices
  • Multiple DIP Switch Replacement
  • Synchronous or asynchronous mode
  • Page register